NXP’s new MCX N microcontrollers include industry’s first instantiation of a specialized, NXP-designed NPU to enable high performance, low power secure intelligence at the edge.
What’s new: NXP® Semiconductors has announced the MCX N94x and MCX N54x, the first families in the N series of the new MCX microcontroller portfolio. Designed to simplify design for secure intelligent edge applications, including IoT and industrial applications, the MCX N features the first instantiation of NXP’s proprietary Neural Processing Unit (NPU) and an integrated EdgeLock® secure subsystem. The MCX N series’ multicore design delivers improved system performance and reduced power consumption by enabling smart, efficient distribution of workloads to the analog and digital peripherals.
Why it matters: To convert edge data into edge intelligence, developers require increased processing, while minimizing the power budget to maintain an energy-efficient design. With a broad set of analog and digital peripherals to choose from, the MCX N94x and MCX N54x families provide the design flexibility and high-performance capabilities engineers need to create innovative designs, while maintaining the low power necessary for advanced edge processing.
More details: “Developers are increasingly looking to push the boundaries of what’s possible at the edge as they create new devices that can better anticipate and automate in smart homes, smart factories and smart cities. This requires advanced MCUs that are more efficient, simplify edge intelligence and do all of that securely,” said Rafael Sotomayor, Executive Vice President and General Manager of Edge Processing and Connectivity & Security, NXP. “As we look to the future of MCUs, the MCX N series delivers the balance between power and performance for tomorrow’s IoT and industrial applications.”
The MCX N series dual-core system pairs a full-featured Arm® Cortex®-M33 core with a streamlined Cortex-M33 to manage control functions, enabling developers to run applications in parallel or reduce power consumption by turning off individual cores as necessary. For example, in secure IoT applications such as over-the-air (OTA) communications, the main core performs the system security, while the streamlined core executes control functionality.
The MCX N94x and MCX N54x are based on dual high-performance Arm® Cortex®-M33 cores running up to 150 MHz, with 2MB of Flash with optional full ECC RAM, a DSP co-processor for audio and voice processing and integrated NPU. The integrated NPU delivers up to 30x faster machine learning throughput compared to a CPU core alone, as well as multiple co-processors and accelerators, enabling it to spend less time awake and reducing overall power consumption. In addition, NXP’s eIQ® machine learning software development environment provides easy-to-use tools to train and support machine learning models using the integrated NPU.
The MCX N series of devices also include a full set of peripherals. The MCX N94x features a wide variety of advanced analog and motor control peripherals, while the MCX N54x includes peripherals ranging from high speed USB with PHY to SD or smart card interfaces suitable for IoT and consumer applications.
The new devices are built following NXP’s secure-by-design approach, offering secure boot with an immutable root-of-trust, hardware accelerated cryptography and a built-in EdgeLock® secure subsystem. This architecture provides support for in-field updates, online transactions, and protection against over-production at remote original design manufacturers (ODMs).
Simplifying Development with Software and Tools
The MCX N devices are supported by the widely adopted MCUXpresso suite of software and tools to optimize, ease and help accelerate embedded system development. The MCUXpresso suite includes tools for simple device configuration and secure programming. Developers can choose to work with the fully featured MCUXpresso IDE or with IDEs from IAR and Keil. NXP provides drivers and middleware with extensive examples and support for a range of RTOS choices, further complemented by a wide range of compatible middleware from NXP’s partner ecosystem, allowing rapid development of a broad range of end applications.
